Hardware Fundamentals

This is the homepage for the hardware fundamentals course. You can find all course information for 2024/2025 here.

Course description

This course is for students with a Bachelor in Computer Science (or equivalent) who joined the CESE Master program. The main goals of the course are as follows. First, to "remove the magic" about field-effect transistors and CMOS logic fabrication and operation. Moreover, we introduce the basics of a modern hardware description language (VERILOG), necessary for some of the folow-up CESE courses. Next, the main advantages and disadvantages of digital signal processing in respect to its analog counterpart will be discussed. Last but not least, the basic principles behind the discrete systems and control theory will be explained based on real-life examples. All in all, the end goal is to equip the CESE students with a Computer Science background with all the necessary knowledge required to successfully specialise in any of the sub-disciplines represented by the research groups delivering the CESE education.

Course Schedule

Here you can find the schedule of the course. Each lecture is denoted by its week and then the first or second lecture of that week. This lecture schedule is also available on Brightspace where it also contains a list of detailed topics per lecture.

Grading

The course consists out of a written exam and 4 lab assignments. Each lab assignment is pass/fail and you are required to pass each lab in order to pass the course. A final grade of 6 is needed to pass the course. Each lab also has a bonus assignment which can reward you 0.25 points extra on top of your final grade. For example, if you get a 7 on the exam and you complete 2 bonus assignments during the labs, your final grade is a 7.5.

Staff

Instructors

• Prof.dr.ir. Georgi Gaydadjiev
• Dr.ing. Anteneh Gebregiorgois

Teaching Assistants

• António Bernardes

Contact

If you need to contact us, you can find us at the course email address: CESE4005.2024@tudelft.nl.

Alternatively, only if you REALLY need to speak to one of us directly, you can contact the main lecturer Georgi at G.N.Gaydadjiev@tudelft.nl or one of the teaching assistants: António (a.p.costabernardes@student.tudelft.nl)

Note that we prefer that you use the course email address. It is possible that we igonore the email sent to personal email without sounded reasons.

Lecture slides

• Introduction
• Lecture 1.1
• Lecture 1.2
• Lecture 2.1
• Lecture 2.2
• Lecture 3.1
• Lecture 3.2
• Lecture 4.1
• Lecture 4.2
• Lecture 5.1
• Lecture 5.2
• Lecture 6.1
• Lecture 6.2
• Lecture 7.1
• Lecture 7.2
• Lecture 8.1
• Lecture 8.2

Labs

For the labs you will be using your own laptops together with an FPGA. You will receive the FPGA from the TAs and it will be used starting Lab 2. As a disclaimer, the labs will require you to use specialized software for the tasks. Each lab contains a tutorial on how to install and use the tool. For the labs you will make groups of TWO on brightspace. You should be able to sign up for a group after the first lecture. Each lab is held in Drebbelweg Instruction Room 3. Each lab contains a homework part and a lab work part. Students are expected to do the homework at home and to do the lab work during the lab. The lab is designed to be completed within the time reserved for the lab. Students will be checked at the start of the lab to make sure that they have completed their homework. If the homework has not been completed before the lab, the student could risk being denied access to the lab. Make sure to sign off lab assignments after completing them. During lab 1 we will help remind you, however in the following labs this reminder will no longer be there.

Lab 1: FET Transistors and CMOS Logic

Introduction

The goal of this lab is to understand the basics of CMOS logic and digital design. You may already have experience with these topics, however, some of the CESE CS students will have had less interaction with actual computer hardware at this very low level. To better understand why computer hardware is designed the way it is, it is essential to understand what it looks like at all levels of the technology. We will not cover the device physics, but we will go into the limitations of CMOS transistors and what this means for design choices at the lowest level of circuit design.

The LAB1 manual can be found here

Lab 2: Signals and Systems

In Lab 2 you will learn how to discretize a simple first-order system using a Jupyter Notebook. If you have not installed Jupyter Notebook yet, please follow the manual below.

Jupyter Notebook Installation Manual

In Labs 2, 3, and 4, you will use Jupyter Notebook to complete the assignments. This document provides an installation guide to ensure Jupyter Notebook is properly installed on your computer before the lab sessions. Please follow the steps below to set up Jupyter Notebook in advance to avoid potential issues during the labs and save valuable time.

We will install Jupyter Notebook using Python's package manager. You can verify if you have Python installed by opening any terminal and type python --version. If this command does not work, you can install Python via https://www.python.org/downloads/ and make sure to check the option Add python.exe to PATH during the installation. If Python is still not recognized as a command, then you can add it to the PATH manually as explained here.

To install Jupyter Notebook, enter pip install jupyter in the terminal. Afterwards, you can use the command jupyter notebook in the directory that contains the Jupyter Notebook file. In the example shown below, you need to open your terminal in the directory my_folder and enter the command jupyter notebook. This will open a local jupyter notebook server in that directory inside your browser, where you can open my_notebook.ipynb.

.
└── my_folder/
    └── my_notebook.ipynb

You can also open a Jupyter Notebook file in Visual Studio Code, which requires the Jupyter extension.

Lab 3: Continuous Systems and Frequency Response

In this lab you will work with second order continuous systems and get a glimpse into frequency response. You can find the jupyter notebook of lab 3 on brightspace.

Lab 4: Control Systems

In this last assignment, you will explore control theory by implementing Proportional, Integral, and Derivative controllers using the control library. The system we will use is based on a simplified model of the drone used for the Embedded Systems Lab to help you prepare the necessary control theory. You will analyze the root locus, open- and closed-loop systems, to study the stability and response of how a PID controller affects system performance. The Jupyter Notebook will be released on Brightspace.

Additional Information

This page will undergo further updates throughout the duration of this course.

Hardware Specification

The FPGA board which will be used in the labs is a Xilinx PYNQ-Z2 board. It consists of a dual-Arm processor(processing system, PS) and an FPGA (Programmable Logic, PL) connected via on-chip high-speed interconnect. It has all the periphirals that are needed to conduct all the contents. Besides, it comes a Python framework (PYNQ) which is able to develop the board using python-enabled infrastraction.

You can find more information about the board in the links:

• PYNQ-Z2 Webpage (Xilinx)
• PYNQ Framework
• Hardware Specification by Vendor
• Xilinx Github Repo

Vivado Installation in Unsupported OS

For those students who are running Linux system that are not in the range of supported OS of Xilinx, there is a hint for you to install vivado. You can refer to https://billauer.co.il/blog/2020/08/vivado-install-unsupported-linux/. (credits to Hidde Leistra)

The RISC-V Manual

You can find the RISC-V Manual at https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf. Refer to pages 103 to 108 for all the instructions.