Computer Engineering
This is the homepage for the computer engineering course. You can find all course information here.
This course is part of the CESE masters programme. This course's curriculum will be continued by the course Processor Design Project
Course Description
The goal of this course is to explain in significant depth what is involved in designing a computer system and to provide more detailed knowledge on specific topics in the area of Computer and Embedded Systems Engineering. The course introduces the entire computer engineering stack and it’s interconnecting layers consisting of both hardware and software. Along with the main principles behind design tools and techniques used in this field. This makes the course an excellent introduction to the field of Computer and Embedded Systems Engineering, the widely used terminology and the most relevant current trends.
Learning Objectives
By the end of the course you will be able to:
- Describe number representation system, conversion between number representation.
- Perform binary arithmetic operation such as addition, multiplication, and division.
- Implement fixed- and floating-point numbers in C/C++ and compare their accuracy.
- Explain basic concepts of computer architecture such as processing unit, memory system, control unit and datapath.
- Use logic gates to implement simple combinational circuits such as adder, multiplexer.
- Write a simplified RISC-V assembly code and Cuda program for grayscale image conversion.
- Explain system software and operating systems fundamentals, task management, synchronization, compilation, and interpretation.
- Use design and automation tools to perform synthesis and optimization.
Course Schedule
Lecture Schedule
| Topic | Date & Time | Location | |
|---|---|---|---|
| L1.1 | Representing Numbers | 4th Sept (13:45) | EEMCS-Hall Ampere |
| L1.2 | Binary Computer Arithmetic | 6th Sept (08:45) | AS-Hall E |
| L2.1 | Putting together a Micro-architecture, RISC-V | 11th Sept (13:45) | EEMCS-Hall Ampere |
| L2.2 | The Architecture of RISC-V (1) | 13th Sept (08:45) | AS-Hall E |
| L3.1 | The Architecture of RISC-V (2) | 18th Sept (13:45) | EEMCS-Hall Ampere |
| L3.2 | The Role of the Assembly Language RISC-V | 20th Sept (08:45) | AS- Hall E |
| L4.1 | RISC-V Input/Output (I/O) and Interrupts | 25th Sept (13:45) | EEMCS-Hall Ampere |
| L4.2 | Computer Systems Memory Hierarchy | 27th Sept (08:45) | AS-Hall E |
| L5.1 | Processors Working Together | 2nd Oct (13:45) | EEMCS-Hall Ampere |
| L5.2 | Moving the Data | 4th Oct (08:45) | AS-Hall E |
| L6.1 | Scaling out the systems | 9th Oct (13:45) | EEMCS-Hall Ampere |
| L6.2 | System Software and OS | 11th Oct (08:45) | AS-Hall E |
| L7.1 | Compilation and Interpretation | 16th Oct (13:45) | EEMCS-Hall Ampere |
| L7.2 | Design Automation Methods (1) | 18th Oct (08:45) | AS-Hall E |
| L8.1 | Design Automation Methods (2) | 23th Oct (13:45) | EEMCS-Hall Ampere |
| L8.2 | High Level Synthesis (HLS) and Domain Specific methods | 25th Oct (08:45) | AS-Hall E |
Exam: 28th Oct, Monday (09:00)
Lab Schedule
| Topic | Date | |
|---|---|---|
| Lab1 | Numerics &Functional Units | 17th Sept |
| Lab2 | RISCV | 1st Oct |
| Lab3 | Parallel Programing with CUDA | 15th Oct |
| Lab4 | EDA Tools | 22th Oct |
Grading
The course consists out of a written exam and 4 lab assignments, 1 per lab session. Each lab assignment is Pass/Fail and you are required to pass each lab in order to pass the course. The lab should be completed during the lab session, a Pass/Fail will be awarded during the lab session
Passing in all the labs and a final grade of 6 is needed to pass the course.